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The 'ABT16853 provide true data at the outputs. A 9-bit parity generator/checker generates a parity-odd (PARITY) output and monitors the parity of the I/O ports with the ERR flag. The parity-error output can be passed, sampled, stored, or cleared from the latch using the latch-enable (LE) and clear (CLR) control inputs. When both OEA and OEB are low, data is transferred from the A bus to the B bus, and inverted parity is generated. Inverted parity is a forced error condition tha...